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| author |   Axel Lin <axel.lin@gmail.com> | 2011-10-24 11:32:41 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-10-24 14:09:42 +0200 |
| commit | 49fa4d9b5aeafb985abe8cb8cdf6432690c49ad3 (patch) | |
| tree | 4c3aee893aa2818d83a1ff5f9691b5749b9cb1b9 /include | |
| parent | ASoC: wm8996: Avoid a redundant i2c_get_clientdata call in wm8996_i2c_remove (diff) | |
ASoC: wm8940: Fix setting PLL Output clock division ratio
According to the datasheet:
The PLL Output clock division ratio is controlled by BIT[5:4] of
WM8940_GPIO register(08h).
Current code read/write the WM8940_ADDCNTRL(07h) register which is wrong.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions