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authorVinod Koul <vkoul@kernel.org>2020-09-16 17:38:33 +0530
committerVinod Koul <vkoul@kernel.org>2020-09-16 17:38:33 +0530
commit5408b220436497d4e6d48010ee7a9735e77791ab (patch)
tree93b96e67eda7a1f6067d764180c21cc0a6e06802 /include
parentphy: Add USB3 PHY support for Intel LGM SoC (diff)
parentphy: cadence-torrent: Set Torrent PHY attributes (diff)
Merge branch 'topic/phy_attrs' into next
Diffstat (limited to 'include')
-rw-r--r--include/linux/phy/phy.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index bcee8eba62b3..e435bdb0bab3 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -115,10 +115,12 @@ struct phy_ops {
/**
* struct phy_attrs - represents phy attributes
* @bus_width: Data path width implemented by PHY
+ * @max_link_rate: Maximum link rate supported by PHY (in Mbps)
* @mode: PHY mode
*/
struct phy_attrs {
u32 bus_width;
+ u32 max_link_rate;
enum phy_mode mode;
};