diff options
| author |   Ben Dooks <ben-linux@fluff.org> | 2007-09-30 09:56:13 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2007-10-12 23:43:28 +0100 |
| commit | 987240cc01faf90100ace8f554ac145c2dfb085c (patch) | |
| tree | 86285a0e5dbf6eabba1216b6d20530087cdd2fbd /include | |
| parent | [ARM] 4585/1: Correctly identify the CPU architecture version (diff) | |
| download | linux-dev-987240cc01faf90100ace8f554ac145c2dfb085c.tar.xz linux-dev-987240cc01faf90100ace8f554ac145c2dfb085c.zip | |
[ARM] 4586/1: S3C2412: power register updates
Add the INFORM register block which are retained
over sleep.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-power.h | 5 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-s3c2412.h | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-power.h b/include/asm-arm/arch-s3c2410/regs-power.h index 94ff96505b6a..f79987be55e8 100644 --- a/include/asm-arm/arch-s3c2410/regs-power.h +++ b/include/asm-arm/arch-s3c2410/regs-power.h @@ -18,6 +18,11 @@ #define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) #define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) +#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70) +#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74) +#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78) +#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C) + #define S3C2412_PWRCFG_BATF_IGNORE (0<<0) #define S3C2412_PWRCFG_BATF_SLEEP (3<<0) #define S3C2412_PWRCFG_BATF_MASK (3<<0) diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h index 8ca6a3bc8555..783b18f5bcea 100644 --- a/include/asm-arm/arch-s3c2410/regs-s3c2412.h +++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h @@ -17,5 +17,7 @@ #define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) #define S3C2412_SWRST_RESET (0x533C2412) +/* see regs-power.h for the other registers in the power block. */ + #endif /* __ASM_ARCH_REGS_S3C2412_H */ |