diff options
| author |   Icenowy Zheng <icenowy@aosc.xyz> | 2016-12-13 23:22:48 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-01-02 22:24:55 +0100 |
| commit | bb021cda2ccf45ee9470bf0f8c55323ad1c761ae (patch) | |
| tree | 215b4d74e53bebc292329acb7046ac9e32a9e686 /include | |
| parent | clk: sunxi-ng: fix PLL_CPUX adjusting on A33 (diff) | |
clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33
The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to
be changeable by changing the rate of PLL_CPUX.
Add CLK_SET_RATE_PARENT flag to this clock.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions