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authorTejun Heo <htejun@gmail.com>2008-05-19 01:15:10 +0900
committerJeff Garzik <jgarzik@redhat.com>2008-05-19 17:51:47 -0400
commitbf1bff6fa9fdd4e92e57d80a5434fd5201c051fc (patch)
tree0ebd09fbf4e7f9f5e81e479685930c180eaece76 /include
parentlibata: ignore recovered PHY errors (diff)
downloadlinux-dev-bf1bff6fa9fdd4e92e57d80a5434fd5201c051fc.tar.xz
linux-dev-bf1bff6fa9fdd4e92e57d80a5434fd5201c051fc.zip
libata: increase PMP register access timeout to 3s
This timeout was set low because previously PMP register access was done via polling and register access timeouts could stack up. This is no longer the case. One timeout will make all following accesses fail immediately. In rare cases both marvell and SIMG PMPs need almost a second. Bump it to 3s. While at it, rename it to SATA_PMP_RW_TIMEOUT. It's not specific to SCR access. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/libata.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 07ec193fc941..8d6999da1d3e 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -341,7 +341,7 @@ enum {
ATA_EH_PMP_TRIES = 5,
ATA_EH_PMP_LINK_TRIES = 3,
- SATA_PMP_SCR_TIMEOUT = 250,
+ SATA_PMP_RW_TIMEOUT = 3000, /* PMP read/write timeout */
/* Horkage types. May be set by libata or controller on drives
(some horkage may be drive/controller pair dependant */