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authorRafał Miłecki <zajec5@gmail.com>2016-07-08 17:14:18 +0200
committerKalle Valo <kvalo@codeaurora.org>2016-07-19 21:13:10 +0300
commitcc2d1de06f0572a51437d1f31633d81afea5eb47 (patch)
tree0723ae5cbce8e496939ad13b8d8523aeb59080ef /include
parentMerge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git (diff)
downloadlinux-dev-cc2d1de06f0572a51437d1f31633d81afea5eb47.tar.xz
linux-dev-cc2d1de06f0572a51437d1f31633d81afea5eb47.zip
bcma: define ChipCommon B MII registers
We don't have access to datasheets to document all the bits but we can name these registers at least. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/bcma/bcma_driver_chipcommon.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index a5ac2cad5cb7..b20e3d56253f 100644
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -504,6 +504,9 @@
#define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000
#define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_SHIFT 20
+#define BCMA_CCB_MII_MNG_CTL 0x0000
+#define BCMA_CCB_MII_MNG_CMD_DATA 0x0004
+
/* BCM4331 ChipControl numbers. */
#define BCMA_CHIPCTL_4331_BT_COEXIST BIT(0) /* 0 disable */
#define BCMA_CHIPCTL_4331_SECI BIT(1) /* 0 SECI is disabled (JATG functional) */