diff options
| author |   Stephan Mueller <smueller@chronox.de> | 2018-07-10 17:56:33 +0200 |
|---|---|---|
| committer |   Herbert Xu <herbert@gondor.apana.org.au> | 2018-07-20 13:51:21 +0800 |
| commit | cf862cbc831982a27f14a08adf82ad9ca8d86205 (patch) | |
| tree | 84b26e66645be295e8e91bace8bcd793daf4c51b /include | |
| parent | crypto: dh - fix memory leak (diff) | |
| download | linux-dev-cf862cbc831982a27f14a08adf82ad9ca8d86205.tar.xz linux-dev-cf862cbc831982a27f14a08adf82ad9ca8d86205.zip | |
crypto: drbg - eliminate constant reinitialization of SGL
The CTR DRBG requires two SGLs pointing to input/output buffers for the
CTR AES operation. The used SGLs always have only one entry. Thus, the
SGL can be initialized during allocation time, preventing a
re-initialization of the SGLs during each call.
The performance is increased by about 1 to 3 percent depending on the
size of the requested buffer size.
Signed-off-by: Stephan Mueller <smueller@chronox.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include')
| -rw-r--r-- | include/crypto/drbg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/crypto/drbg.h b/include/crypto/drbg.h index 8f941102af36..54b9f5d375f5 100644 --- a/include/crypto/drbg.h +++ b/include/crypto/drbg.h @@ -127,6 +127,7 @@ struct drbg_state { __u8 *outscratchpadbuf; /* CTR mode output scratchpad */ __u8 *outscratchpad; /* CTR mode aligned outbuf */ struct crypto_wait ctr_wait; /* CTR mode async wait obj */ + struct scatterlist sg_in, sg_out; /* CTR mode SGLs */ bool seeded; /* DRBG fully seeded? */ bool pr; /* Prediction resistance enabled? */ |