diff options
| author | 2019-04-25 22:24:19 +0300 | |
|---|---|---|
| committer | 2019-04-26 18:14:52 +0300 | |
| commit | d428ca17ea3d307c5a7f77cf24586584bf1c2d74 (patch) | |
| tree | 4b265a885a094e634f9e2e8d244917eafe1a6f04 /include | |
| parent | drm/i915: Enable render context support for gen4 (Broadwater to Cantiga) (diff) | |
drm/i915: Fix ICL output CSC programming
When I refactored the code into its own function I accidentally
misplaced the <<16 shifts for some of the registers causing us
to lose the blue channel entirely.
We should really find a way to test this...
Cc: Uma Shankar <uma.shankar@intel.com>
Fixes: d2c19b06d6ea ("drm/i915: Clean up ilk/icl pipe/output CSC programming")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190425192419.24931-1-ville.syrjala@linux.intel.com
Reviewed-by: Swati Sharma <swati2.sharma@intel.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions
