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| author |   Niklas Cassel <niklas.cassel@axis.com> | 2018-03-28 13:50:13 +0200 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-04-03 12:38:04 +0100 |
| commit | fca83058753456528bef62579ae2b50799d7a473 (patch) | |
| tree | 4e722d95203314948064aa37141c38a7ee9a5e8e /include | |
| parent | PCI: cadence: Set PCI_BASE_ADDRESS_MEM_TYPE_64 if a 64-bit BAR was set-up (diff) | |
PCI: endpoint: Handle 64-bit BARs properly
If a 64-bit BAR was set-up, we need to skip a BAR,
since a 64-bit BAR consists of a BAR pair.
We need to check what BAR width the epc->ops->set_bar() specific
implementation actually did set-up, since some drivers, like the
Cadence EP controller, sometimes sets up a 64-bit BAR, even though
a 32-bit BAR was requested.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions