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authorZahari Petkov <zahari@balena.io>2019-11-18 23:02:55 +0200
committerPavel <pavel@ucw.cz>2019-12-21 20:09:51 +0100
commit697529091ac7a0a90ca349b914bb30641c13c753 (patch)
tree20f800a6e25b36a5c9890f11c5e5f1ce5e041d4b /kernel/latencytop.c
parentleds-as3645a: Drop fwnode reference on ignored node (diff)
downloadlinux-dev-697529091ac7a0a90ca349b914bb30641c13c753.tar.xz
linux-dev-697529091ac7a0a90ca349b914bb30641c13c753.zip
leds: pca963x: Fix open-drain initialization
Before commit bb29b9cccd95 ("leds: pca963x: Add bindings to invert polarity") Mode register 2 was initialized directly with either 0x01 or 0x05 for open-drain or totem pole (push-pull) configuration. Afterwards, MODE2 initialization started using bitwise operations on top of the default MODE2 register value (0x05). Using bitwise OR for setting OUTDRV with 0x01 and 0x05 does not produce correct results. When open-drain is used, instead of setting OUTDRV to 0, the driver keeps it as 1: Open-drain: 0x05 | 0x01 -> 0x05 (0b101 - incorrect) Totem pole: 0x05 | 0x05 -> 0x05 (0b101 - correct but still wrong) Now OUTDRV setting uses correct bitwise operations for initialization: Open-drain: 0x05 & ~0x04 -> 0x01 (0b001 - correct) Totem pole: 0x05 | 0x04 -> 0x05 (0b101 - correct) Additional MODE2 register definitions are introduced now as well. Fixes: bb29b9cccd95 ("leds: pca963x: Add bindings to invert polarity") Signed-off-by: Zahari Petkov <zahari@balena.io> Signed-off-by: Pavel Machek <pavel@ucw.cz>
Diffstat (limited to 'kernel/latencytop.c')
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