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| author |   Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-07-24 11:28:15 +0100 |
|---|---|---|
| committer |   Herbert Xu <herbert@gondor.apana.org.au> | 2017-08-04 09:27:22 +0800 |
| commit | ec808bbef0b15ad103771222d419245617378f32 (patch) | |
| tree | d124df8125277a21a7449274f606295eca344ba9 /lib/mpi/mpi-pow.c | |
| parent | crypto: arm64/chacha20 - take may_use_simd() into account (diff) | |
| download | linux-dev-ec808bbef0b15ad103771222d419245617378f32.tar.xz linux-dev-ec808bbef0b15ad103771222d419245617378f32.zip | |
crypto: arm64/aes-bs - implement non-SIMD fallback for AES-CTR
Of the various chaining modes implemented by the bit sliced AES driver,
only CTR is exposed as a synchronous cipher, and requires a fallback in
order to remain usable once we update the kernel mode NEON handling logic
to disallow nested use. So wire up the existing CTR fallback C code.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'lib/mpi/mpi-pow.c')
0 files changed, 0 insertions, 0 deletions