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| author |   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2021-11-17 11:50:58 +0000 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2021-11-19 11:37:03 +0100 |
| commit | 27527a3d3b162e4512798c058c0e8a216c721187 (patch) | |
| tree | 343d82438260c985adef4de1b109f43a9d531ef7 /lib/test_overflow.c | |
| parent | clk: renesas: r9a07g044: Add RSPI clock and reset entries (diff) | |
| download | linux-dev-27527a3d3b162e4512798c058c0e8a216c721187.tar.xz linux-dev-27527a3d3b162e4512798c058c0e8a216c721187.zip | |
clk: renesas: rzg2l: Check return value of pm_genpd_init()
Make sure we check the return value of pm_genpd_init() which might fail.
Also add a devres action to remove the power-domain in-case the probe
callback fails further down in the code flow.
Fixes: ef3c613ccd68a ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117115101.28281-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'lib/test_overflow.c')
0 files changed, 0 insertions, 0 deletions