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| author |   Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2021-12-01 16:32:57 +0900 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2021-12-07 16:29:25 +0100 |
| commit | 81c1655823237eaec74b2c175ae8e13adfccdaf7 (patch) | |
| tree | 63c3032f6854db054d41197566363adc3efd86b6 /lib/test_overflow.c | |
| parent | dt-bindings: power: Add r8a779f0 SYSC power domain definitions (diff) | |
| download | linux-dev-81c1655823237eaec74b2c175ae8e13adfccdaf7.tar.xz linux-dev-81c1655823237eaec74b2c175ae8e13adfccdaf7.zip | |
dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas
R-Car S4-8 (R8A779F0) SoC.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'lib/test_overflow.c')
0 files changed, 0 insertions, 0 deletions