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| author |   Stephen Boyd <sboyd@kernel.org> | 2021-12-28 21:42:12 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-12-28 21:42:12 -0800 |
| commit | a5ce1d51187051384e18c9aceedd145787599c03 (patch) | |
| tree | 24bb191f8ae876aee03b5a712d924efd9eedcc45 /lib/test_overflow.c | |
| parent | Merge tag 'renesas-clk-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas (diff) | |
| parent | clk: renesas: r9a07g044: Add GPU clock and reset entries (diff) | |
| download | linux-dev-a5ce1d51187051384e18c9aceedd145787599c03.tar.xz linux-dev-a5ce1d51187051384e18c9aceedd145787599c03.zip | |
Merge tag 'renesas-clk-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add GPU clock and resets on Renesas RZ/G2L
- Miscellaneous fixes and improvements
* tag 'renesas-clk-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a07g044: Add GPU clock and reset entries
clk: renesas: r9a07g044: Add mux and divider for G clock
clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro
clk: renesas: cpg-mssr: Add support for R-Car S4-8
clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver
dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
dt-bindings: power: Add r8a779f0 SYSC power domain definitions
Diffstat (limited to 'lib/test_overflow.c')
0 files changed, 0 insertions, 0 deletions