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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2019-11-09 16:47:34 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-11-09 16:47:34 -0800 |
| commit | 4763c0894a2b65f7ff97b3baa368246bb3ba2480 (patch) | |
| tree | a70d131d23559306b5ebbf5ce5138730599cf7a7 /lib | |
| parent | Merge tag 'for-5.4-rc6-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux (diff) | |
| parent | pinctrl: stmfx: fix valid_mask init sequence (diff) | |
| download | linux-dev-4763c0894a2b65f7ff97b3baa368246bb3ba2480.tar.xz linux-dev-4763c0894a2b65f7ff97b3baa368246bb3ba2480.zip | |
Merge tag 'pinctrl-v5.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
- Fix glitch risks in the Intel GPIO
- Fix the Intel Cherryview valid irq mask calculation.
- Allocate the Intel Cherryview irqchip dynamically.
- Fix the valid mask init sequency on the ST STMFX driver.
* tag 'pinctrl-v5.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: stmfx: fix valid_mask init sequence
pinctrl: cherryview: Allocate IRQ chip dynamic
pinctrl: cherryview: Fix irq_valid_mask calculation
pinctrl: intel: Avoid potential glitches if pin is in GPIO mode
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions