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| author |   David S. Miller <davem@davemloft.net> | 2015-10-30 12:21:57 +0900 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2015-10-30 12:21:57 +0900 |
| commit | 65bdc43d2220bc97af037c87aba2407b46f13c2a (patch) | |
| tree | 7b6bca0cfcf606f47d9b998cbc44cbc9b75b2729 /net | |
| parent | bridge: set is_local and is_static before fdb entry is added to the fdb hashtable (diff) | |
| parent | Documentation: dts: xgene: Add TX/RX delay field (diff) | |
| download | linux-dev-65bdc43d2220bc97af037c87aba2407b46f13c2a.tar.xz linux-dev-65bdc43d2220bc97af037c87aba2407b46f13c2a.zip | |
Merge branch 'xgene_txrx_delay'
Iyappan Subramanian says:
====================
drivers: xgene: Add support RGMII TX/RX delay configuration
X-Gene RGMII ethernet controller has a RGMII bridge that performs the
task of converting the RGMII signal {RX_CLK,RX_CTL, RX_DATA[3:0]} from
PHY to GMII signal {RX_DV,RX_ER,RX_DATA[7:0]} and vice versa. This
RGMII bridge has a provision to internally delay the input RX_CLK and
the output TX_CLK using configuration registers. This will help in
maintain the CLK-CTL delay relationship in various operating
conditions.
This patch adds support RGMII TX/RX delay configuration.
====================
Signed-off-by: Iyappan Subramanian <isubramanian@apm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions