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| author |   Ben Hutchings <bhutchings@solarflare.com> | 2011-02-22 17:26:10 +0000 |
|---|---|---|
| committer | Ben Hutchings <bhutchings@solarflare.com> | 2011-03-04 17:58:42 +0000 |
| commit | 65f0b417dee94f779ce9b77102b7d73c93723b39 (patch) | |
| tree | 390279203a8c73a986d15be5cc30f9bb2e95c1e8 /net | |
| parent | sfc: Bump version to 3.1 (diff) | |
| download | linux-dev-65f0b417dee94f779ce9b77102b7d73c93723b39.tar.xz linux-dev-65f0b417dee94f779ce9b77102b7d73c93723b39.zip | |
sfc: Use write-combining to reduce TX latency
Based on work by Neil Turton <nturton@solarflare.com> and
Kieran Mansley <kmansley@solarflare.com>.
The BIU has now been verified to handle 3- and 4-dword writes within a
single 128-bit register correctly. This means we can enable write-
combining and only insert write barriers between writes to distinct
registers.
This has been observed to save about 0.5 us when pushing a TX
descriptor to an empty TX queue.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions