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| author |   Atish Patra <atish.patra@wdc.com> | 2019-08-02 21:27:23 -0700 |
|---|---|---|
| committer |   Paul Walmsley <paul.walmsley@sifive.com> | 2019-08-08 16:05:38 -0700 |
| commit | 94ed3fde38c7c1347cd82b945553905cfd992ab9 (patch) | |
| tree | 8fd9a56c5a8d11503506ddcc18c501882156cfe8 /net | |
| parent | RISC-V: Remove per cpu clocksource (diff) | |
| download | linux-dev-94ed3fde38c7c1347cd82b945553905cfd992ab9.tar.xz linux-dev-94ed3fde38c7c1347cd82b945553905cfd992ab9.zip | |
dt-bindings: Update the riscv,isa string description
Since the RISC-V specification states that ISA description strings are
case-insensitive, there's no functional difference between mixed-case,
upper-case, and lower-case ISA strings. Thus, to simplify parsing,
specify that the letters present in "riscv,isa" must be all lowercase.
Suggested-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions