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| author |   James Hogan <james.hogan@imgtec.com> | 2016-05-16 19:32:35 +0100 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2016-05-17 11:05:07 +0200 |
| commit | fd716fca10fc3dc0f18b8c16d4ecfa6d93f010d2 (patch) | |
| tree | 6ad81b087394d455303ee5d79825f7292f35d235 /net | |
| parent | MIPS: DEC: Export `ioasic_ssr_lock' to modules (diff) | |
| download | linux-dev-fd716fca10fc3dc0f18b8c16d4ecfa6d93f010d2.tar.xz linux-dev-fd716fca10fc3dc0f18b8c16d4ecfa6d93f010d2.zip | |
MIPS: perf: Fix I6400 event numbers
Fix perf hardware performance counter event numbers for I6400. This core
does not follow the performance event numbering scheme of previous MIPS
cores. All performance counters (both odd and even) are capable of
counting any of the available events.
Fixes: 4e88a8621301 ("MIPS: Add cases for CPU_I6400")
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13259/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions