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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2018-05-17 11:04:15 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-06-19 10:19:51 +0200 |
| commit | 3d5155eaadaf512808cb57ec0c7db7bd4cc1ef67 (patch) | |
| tree | b552e62b9222acd545013611a84241122220d836 /samples/hidraw/ssh:/git@git.zx2c4.com/git: | |
| parent | Linux 4.18-rc1 (diff) | |
clk: renesas: r8a7795: Add CR clock
Add the CR core clock, which is used by the Secure Engine (SCEG).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Gilad Ben-Yossef <gilad@benyossef.com>
Diffstat (limited to 'samples/hidraw/ssh:/git@git.zx2c4.com/git:')
0 files changed, 0 insertions, 0 deletions