diff options
| author | 2019-01-19 00:43:37 +0100 | |
|---|---|---|
| committer | 2019-02-11 12:52:26 -0800 | |
| commit | b7d10841e5d7003bb8bc57c122494b4fb47836c0 (patch) | |
| tree | a43129b91e29e4294509cc8268227cbd99d4c0b8 /samples/hidraw/ssh:/git@git.zx2c4.com/git: | |
| parent | ARM: dts: meson8m2: mxiii-plus: add iio-hwmon for the chip temperature (diff) | |
ARM: dts: meson8b: ec100: enable the Ethernet PHY interrupt
The INTR32 pin of the IP101GR Ethernet PHY is routed to the GPIOH_3 pad
on the SoC.
Enable the interrupt function of the PHY's INTR32 pin to switch it from
it's default "receive error" mode to "interrupt pin" mode.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'samples/hidraw/ssh:/git@git.zx2c4.com/git:')
0 files changed, 0 insertions, 0 deletions
