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| author |   Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-31 17:05:14 +0900 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2016-05-31 12:46:18 +0200 |
| commit | 72e5706aa786f6640b229717b7d9d537058c59cf (patch) | |
| tree | 8e14a67f1e887411ac0dbdcd5daa139b18eeb3c4 /scripts/basic | |
| parent | pinctrl: uniphier: rename macros for drive strength control (diff) | |
pinctrl: uniphier: support 3-bit drive strength control
The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
strength control. Drive strength of some pins are controlled by
3-bit width registers (8-level granularity).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'scripts/basic')
0 files changed, 0 insertions, 0 deletions