diff options
| author |   Ruchika Kharwar <ruchika@ti.com> | 2013-05-30 14:54:09 -0500 |
|---|---|---|
| committer |   Felipe Balbi <balbi@ti.com> | 2013-06-01 00:22:49 +0300 |
| commit | 81fbf101f2858e63bbb380447a76870924b84653 (patch) | |
| tree | 5146e6b96361157dd674b5f0ca5109f728d8d4ae /scripts/basic | |
| parent | usb: dwc3: remove redundant D0 power state set (diff) | |
usb: phy: omap-usb3: updated dpll M,N values to support DRA7xx devices
Addition of the M and N recommended values for the USB3 PHY DPLL.
Sysclk for DRA7xx is 20MHz.
This yields:
Clk = 20MHz * M/(N+1) = 20MHz * 1000 /(7+1) = 2.5 Ghz
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'scripts/basic')
0 files changed, 0 insertions, 0 deletions