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authorCharlene Liu <charlene.liu@amd.com>2017-08-01 21:13:24 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:16:16 -0400
commit0d18d7bb80132467a3b88a2fe7277dc1fee65353 (patch)
treec3b3b457067aeedecfeb3e0e88dfdad6b877a2b2 /scripts/diffconfig
parentdrm/amd/display: update predefined latency for Rv1_F0 (diff)
drm/amd/display: fix dlg ttu calculation input
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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0 files changed, 0 insertions, 0 deletions