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author | 2022-06-03 15:05:04 +0200 | |
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committer | 2022-06-08 11:24:13 -0400 | |
commit | 84205d00934394076552e2f597cf04a835df3364 (patch) | |
tree | 627993636be98c2eddb0ef462d7b457f5efdd6a8 /scripts/generate_rust_analyzer.py | |
parent | drm/amdgpu: fix limiting AV1 to the first instance on VCN3 (diff) | |
download | linux-dev-84205d00934394076552e2f597cf04a835df3364.tar.xz linux-dev-84205d00934394076552e2f597cf04a835df3364.zip |
drm/amdgpu: always flush the TLB on gfx8
The TLB on GFX8 stores each block of 8 PTEs where any of the valid bits
are set.
Fixes: 5255e146c99a ("drm/amdgpu: rework TLB flushing")
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Michal Kubecek <mkubecek@suse.cz>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions