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authorZhi Wang <zhi.a.wang@intel.com>2018-05-14 05:19:07 +0800
committerZhi Wang <zhi.a.wang@intel.com>2018-05-14 05:22:01 +0800
commitbba9525520b6028ecbe7486e13216e9ede8636be (patch)
treef82f4f2adecf6f97933c88050682d44336db783e /scripts/mod
parentdrm/i915/gvt: let force_to_nonpriv cmd handler only valid for LRI cmd (diff)
parentdrm/i915/gen9: Add WaClearHIZ_WM_CHICKEN3 for bxt and glk (diff)
Merge branch 'drm-intel-next-queued' into gvt-next
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Diffstat (limited to 'scripts/mod')
-rw-r--r--scripts/mod/modpost.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index 9917f928d0fd..4ff08a0ef5d3 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -840,8 +840,7 @@ static const char *const section_white_list[] =
".debug*",
".cranges", /* sh64 */
".zdebug*", /* Compressed debug sections. */
- ".GCC-command-line", /* mn10300 */
- ".GCC.command.line", /* record-gcc-switches, non mn10300 */
+ ".GCC.command.line", /* record-gcc-switches */
".mdebug*", /* alpha, score, mips etc. */
".pdr", /* alpha, score, mips etc. */
".stab*",
@@ -1104,8 +1103,8 @@ static const struct sectioncheck *section_mismatch(
/*
* The target section could be the SHT_NUL section when we're
* handling relocations to un-resolved symbols, trying to match it
- * doesn't make much sense and causes build failures on parisc and
- * mn10300 architectures.
+ * doesn't make much sense and causes build failures on parisc
+ * architectures.
*/
if (*tosec == '\0')
return NULL;