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| author | 2019-08-23 01:20:37 -0700 | |
|---|---|---|
| committer | 2019-08-27 08:27:49 -0700 | |
| commit | 6056517ab8c30fb239b08c06ef577677cbcd409c (patch) | |
| tree | 28af2d6b49ccdc40bb36684483e98636bab94385 /scripts/objdiff | |
| parent | drm/i915: Make engine's batch pool safe for use with virtual engines (diff) | |
drm/i915/tgl: Guard and warn if more than one eDP panel is present
On TGL+ it's possible to have PSR1 enabled in other ports besides DDIA.
PSR2 is still limited to DDIA. However currently we handle only one
instance of PSR struct. Lets guard intel_psr_init_dpcd() against
multiple eDP panels and warn about it.
v2: Reword commit message to be TGL+ only and with the info where
PSR1/PSR2 are supported (Lucas)
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823082055.5992-6-lucas.demarchi@intel.com
Diffstat (limited to 'scripts/objdiff')
0 files changed, 0 insertions, 0 deletions
