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| author |   Leo Liu <leo.liu@amd.com> | 2019-11-15 12:45:55 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-07-01 01:59:09 -0400 |
| commit | cf14826cdfb5c9fe10f98210d040b9d7486c381d (patch) | |
| tree | 9c739a30960b79397781a766fe77e0c7b057be88 /scripts/stackusage | |
| parent | drm/amdgpu/mes: correct register offset for sienna_cichlid (diff) | |
drm/amdgpu: add VCN3.0 support for Sienna_Cichlid
With basic IP block functions and ring functions
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/stackusage')
0 files changed, 0 insertions, 0 deletions