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| author |   Russell King <rmk+kernel@arm.linux.org.uk> | 2015-04-04 20:09:46 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-06-01 23:48:19 +0100 |
| commit | b2c3e38a54714e917c9e8675ff5812dca1c0f39d (patch) | |
| tree | 0d5e9747b2c73ccd4c961c8d6a50841b52cf11fd /security | |
| parent | ARM: cleanup early_paging_init() calling (diff) | |
| download | linux-dev-b2c3e38a54714e917c9e8675ff5812dca1c0f39d.tar.xz linux-dev-b2c3e38a54714e917c9e8675ff5812dca1c0f39d.zip | |
ARM: redo TTBR setup code for LPAE
Re-engineer the LPAE TTBR setup code. Rather than passing some shifted
address in order to fit in a CPU register, pass either a full physical
address (in the case of r4, r5 for TTBR0) or a PFN (for TTBR1).
This removes the ARCH_PGD_SHIFT hack, and the last dangerous user of
cpu_set_ttbr() in the secondary CPU startup code path (which was there
to re-set TTBR1 to the appropriate high physical address space on
Keystone2.)
Tested-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'security')
0 files changed, 0 insertions, 0 deletions