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authorTakashi Iwai <tiwai@suse.de>2015-02-19 18:12:22 +0100
committerTakashi Iwai <tiwai@suse.de>2015-02-19 21:41:40 +0100
commit96d2bd6e3cdf57926f80605d6e28051bb6b24eb3 (patch)
treedd8378bc79a3bda6ef23786970789deb46801564 /sound/pci/hda/hda_controller.c
parentALSA: hda - Drop azx_mixer_create() (diff)
downloadlinux-dev-96d2bd6e3cdf57926f80605d6e28051bb6b24eb3.tar.xz
linux-dev-96d2bd6e3cdf57926f80605d6e28051bb6b24eb3.zip
ALSA: hda - Split azx_codec_create() to two phases
azx_create_codec() function does actually two things: create a bus and probe codecs. For the future work, split this to two logical functions, azx_bus_create() and azx_probe_codecs(). Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/hda/hda_controller.c')
-rw-r--r--sound/pci/hda/hda_controller.c40
1 files changed, 24 insertions, 16 deletions
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c
index 6fab39133051..2a674525e56f 100644
--- a/sound/pci/hda/hda_controller.c
+++ b/sound/pci/hda/hda_controller.c
@@ -1829,13 +1829,11 @@ static struct hda_bus_ops bus_ops = {
#endif
};
-/* Codec initialization */
-int azx_codec_create(struct azx *chip, const char *model,
- unsigned int max_slots,
- int *power_save_to)
+/* HD-audio bus initialization */
+int azx_bus_create(struct azx *chip, const char *model, int *power_save_to)
{
struct hda_bus *bus;
- int c, codecs, err;
+ int err;
err = snd_hda_bus_new(chip->card, &bus);
if (err < 0)
@@ -1855,6 +1853,26 @@ int azx_codec_create(struct azx *chip, const char *model,
bus->needs_damn_long_delay = 1;
}
+ /* AMD chipsets often cause the communication stalls upon certain
+ * sequence like the pin-detection. It seems that forcing the synced
+ * access works around the stall. Grrr...
+ */
+ if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) {
+ dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n");
+ bus->sync_write = 1;
+ bus->allow_bus_reset = 1;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(azx_bus_create);
+
+/* Probe codecs */
+int azx_probe_codecs(struct azx *chip, unsigned int max_slots)
+{
+ struct hda_bus *bus = chip->bus;
+ int c, codecs, err;
+
codecs = 0;
if (!max_slots)
max_slots = AZX_DEFAULT_CODECS;
@@ -1882,16 +1900,6 @@ int azx_codec_create(struct azx *chip, const char *model,
}
}
- /* AMD chipsets often cause the communication stalls upon certain
- * sequence like the pin-detection. It seems that forcing the synced
- * access works around the stall. Grrr...
- */
- if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) {
- dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n");
- bus->sync_write = 1;
- bus->allow_bus_reset = 1;
- }
-
/* Then create codec instances */
for (c = 0; c < max_slots; c++) {
if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) {
@@ -1910,7 +1918,7 @@ int azx_codec_create(struct azx *chip, const char *model,
}
return 0;
}
-EXPORT_SYMBOL_GPL(azx_codec_create);
+EXPORT_SYMBOL_GPL(azx_probe_codecs);
/* configure each codec instance */
int azx_codec_configure(struct azx *chip)