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| author |   Takashi Iwai <tiwai@suse.de> | 2012-07-19 08:03:20 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2012-07-19 08:03:20 +0200 |
| commit | 4609ed6b1f0ab9f11a9d0361573b53d9d057c440 (patch) | |
| tree | 802119cc6ddea286bc03d56431286ac52166352e /sound/soc/samsung/s3c2412-i2s.c | |
| parent | ALSA: hda - make sure alc268 does not OOPS on codec parse (diff) | |
| parent | ASoC imx-audmux: add MX31_AUDMUX_PORT7_SSI_PINS_7 define (diff) | |
| download | linux-dev-4609ed6b1f0ab9f11a9d0361573b53d9d057c440.tar.xz linux-dev-4609ed6b1f0ab9f11a9d0361573b53d9d057c440.zip | |
Merge tag 'asoc-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for 3.6
This has been a pretty quiet release - very little activity in framework
terms, mostly just a few new drivers and updates:
- Added the ability to add and remove DAPM paths dynamically, mostly for
reparenting on clock changes.
- New machine drivers for Marvell Brownstone, ST-Ericsson Ux500
reference platform and ttc-dkp.
- New CPU drivers for Blackfin BF6xx SPORTs in I2S mode, Marvell MMP,
Synopsis Designware I2S controllers, and SPEAr DMA and S/PDIF
- New CODEC drivers for Dialog DA732x, ST STA529, ST-Ericsson AB8500, TI
Isabelle and Wolfson Microelectronics WM5102 and WM5110
Diffstat (limited to 'sound/soc/samsung/s3c2412-i2s.c')
| -rw-r--r-- | sound/soc/samsung/s3c2412-i2s.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/sound/soc/samsung/s3c2412-i2s.c b/sound/soc/samsung/s3c2412-i2s.c index 79fbeea99d46..ac7701b3c5dc 100644 --- a/sound/soc/samsung/s3c2412-i2s.c +++ b/sound/soc/samsung/s3c2412-i2s.c @@ -25,7 +25,6 @@ #include <sound/soc.h> #include <sound/pcm_params.h> -#include <mach/regs-gpio.h> #include <mach/dma.h> #include "dma.h" @@ -83,12 +82,9 @@ static int s3c2412_i2s_probe(struct snd_soc_dai *dai) s3c2412_i2s.iis_cclk = s3c2412_i2s.iis_pclk; - /* Configure the I2S pins in correct mode */ - s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK); - s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_I2SSCLK); - s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_CDCLK); - s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI); - s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); return 0; } |