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| author |   Yuantian Tang <andy.tang@nxp.com> | 2017-04-06 10:21:23 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@codeaurora.org> | 2017-07-21 15:01:45 -0700 |
| commit | 45899dc5f1b5107903b2bc1c78e22d7945a895fd (patch) | |
| tree | 3fd26f32e29df70988425286b55376755f755d33 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | clk: qoriq: add clock configuration for ls1088a soc (diff) | |
clk: qoriq: add pll clock to clock lookup table
Register each PLL and its division clocks to clock
lookup table to facilitate the clock look up for
clock consumer.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions