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| author |   Ettore Chimenti <ek5.chimenti@gmail.com> | 2018-12-27 08:06:35 -0500 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2019-01-16 11:44:50 -0500 |
| commit | 88903a1abd00e051f3ddfe7b86949882260ddf86 (patch) | |
| tree | f56146fc1fdfa969e910948b36f879a6c9d4bbdb /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | media: cxd2880-spi: fix two memory leaks of dvb_spi (diff) | |
media: secocec: fix ir address shift
The actual value of the RC5 System Number (address) is stored in the
IR_READ_DATA common register masked with 0x1F00 so it have to be shifted
by 8 bits.
Signed-off-by: Ettore Chimenti <ek5.chimenti@gmail.com>
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions