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| author | 2020-08-20 16:02:16 -0700 | |
|---|---|---|
| committer | 2020-09-28 14:42:45 -0700 | |
| commit | e5f020ad610b11827914245048ec55a7bb030944 (patch) | |
| tree | 56157aa2127db9a620cc0022937bd6be72f6790d /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | igc: Expose LPI counters (diff) | |
igc: Remove references to SYSTIMR register
In i225, it's no longer necessary to use the SYSTIMR register to
latch the timer value, the timestamp is latched when SYSTIML is read.
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions
