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| author | 2019-09-13 15:11:04 -0300 | |
|---|---|---|
| committer | 2019-10-24 18:30:17 -0300 | |
| commit | 0e78795e95c540bc49c2e094103932eb6a06e6c8 (patch) | |
| tree | 7862483995bef39fda7f4a8ad526dea30655bfb2 /tools/perf/scripts/python/bin | |
| parent | media: cedrus: Add HEVC/H.265 decoding support (diff) | |
media: aspeed: refine hsync/vsync polarity setting logic
To prevent inaccurate detections of resolution, this commit enables
clearing of hsync/vsync polarity bits based on probed sync state.
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions
