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| author | 2011-10-24 11:33:55 +0800 | |
|---|---|---|
| committer | 2011-10-24 14:09:50 +0200 | |
| commit | bdb527e9ae038d76917a999108176c5f5be5e35e (patch) | |
| tree | ffc7e7df288d6a54b16d43ab037d1d98cc505b12 /tools/perf/scripts/python/bin | |
| parent | ASoC: wm8940: Fix setting PLL Output clock division ratio (diff) | |
ASoC: wm8940: Fix a typo for the mask of setting WM8940_BCLKDIV
The registers are 16 bits, thus remove an extra F for the mask.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions
