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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-02-25 15:13:38 +0200 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-05 08:52:38 +0200 |
| commit | 12fabbcb9f0935c283230217c7de6b26d3d5caac (patch) | |
| tree | 3c93a8b2550ab04707f7a544cb1f2f263155cbad /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | drm/i915/vlv: add pll assertion when disabling DPIO common well (diff) | |
| download | linux-dev-12fabbcb9f0935c283230217c7de6b26d3d5caac.tar.xz linux-dev-12fabbcb9f0935c283230217c7de6b26d3d5caac.zip | |
drm/i915: Set AGPBUSY# bit in init_clock_gating
I don't see why we wouldn't want interrupts to wake up the CPU from C3
always, so just set the AGPBUSY# bit in gen3_init_clock_gating().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions