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| author |   Arnd Bergmann <arnd@arndb.de> | 2014-11-19 17:26:52 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-11-19 17:26:52 +0100 |
| commit | 5210436b8180bf406cdc9c85ed09a46bccfd6e64 (patch) | |
| tree | 7ec7204ee373a8b548e479f774cb22396cd45da8 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | Merge tag 'renesas-dt-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes (diff) | |
| parent | ARM: shmobile: r8a7740 legacy: Correct IIC0 parent clock (diff) | |
| download | linux-dev-5210436b8180bf406cdc9c85ed09a46bccfd6e64.tar.xz linux-dev-5210436b8180bf406cdc9c85ed09a46bccfd6e64.zip | |
Merge tag 'renesas-clock-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Pull "Renesas ARM Based SoC Clock Fixes for v3.18" from Simon Horman:
* Correct IIC0 parent clock for r8a7740
* Add missing INTCA clock for irqpin module for r8a7740
* Correct SD3CKCR address on r8a7790
* tag 'renesas-clock-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7740 legacy: Correct IIC0 parent clock
ARM: shmobile: r8a7740 legacy: Add missing INTCA clock for irqpin module
ARM: shmobile: r8a7790: Fix SD3CKCR address
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions