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| author |   Thierry Reding <treding@nvidia.com> | 2014-08-26 17:11:38 +0200 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2014-09-16 16:55:49 -0600 |
| commit | 7f1f054b3fac0b19ec0d74e3e18b73785c26f0a8 (patch) | |
| tree | 57fe5853eaa5f0e8763635a29f3c82a1dbbb9337 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | PCI: tegra: Make sure the PCIe PLL is really reset (diff) | |
| download | linux-dev-7f1f054b3fac0b19ec0d74e3e18b73785c26f0a8.tar.xz linux-dev-7f1f054b3fac0b19ec0d74e3e18b73785c26f0a8.zip | |
PCI: tegra: Add Tegra124 support
The PCIe controller on Tegra124 has two root ports that can be used in a
x4/x1 or x2/x1 configuration and can run at PCIe 2.0 link speeds (up to
5 GT/s). The PHY programming has been moved into a separate controller, so
the driver now needs to request an external PHY referenced using the device
tree.
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions