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| author |   Dinh Nguyen <dinguyen@opensource.altera.com> | 2013-11-20 09:39:17 -0600 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-07-22 13:16:51 -0500 |
| commit | c5dab6e2c1f7bbf33ec855cebae92a1566ed6d04 (patch) | |
| tree | dbd69f64bd7bc2dee0495ca914424ec04b791d1c /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | ARM: dts: socfpga: Add support of Terasic DE0 Atlas board (diff) | |
| download | linux-dev-c5dab6e2c1f7bbf33ec855cebae92a1566ed6d04.tar.xz linux-dev-c5dab6e2c1f7bbf33ec855cebae92a1566ed6d04.zip | |
ARM: socfpga: dts: Correct the parent clock for l3_sp_clk and dbg_clk
The l3_sp_clk's parent should be the l3_mp_clk. This will account for
the extra divider that is present for the l3_mp_clk.
The dbg_clk's parent should be the dbg_at_clk. This will account for
the extra divider that is present for the dbg_at_clk.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions