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| author |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-06-01 18:34:02 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-06-01 18:34:02 -0700 |
| commit | 2981deb83de2b94947086a992b961b2339988a71 (patch) | |
| tree | ef8725c2a548912384c110ee191f0cffe41ce74f /tools/perf/scripts/python/call-graph-from-sql.py | |
| parent | Merge tag 'riscv-for-linus-5.19-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (diff) | |
| parent | riscv: dts: icicle: sort nodes alphabetically (diff) | |
| download | linux-dev-2981deb83de2b94947086a992b961b2339988a71.tar.xz linux-dev-2981deb83de2b94947086a992b961b2339988a71.zip | |
RISC-V: PolarFire SoC Device Tree Updates
This add a device tree for Sundance Polarberry, along with various
cleanups to the PolarFire SOC device trees and bindings.
Link: https://lore.kernel.org/r/20220509142610.128590-1-conor.dooley@microchip.com
* 'riscv-pfsoc-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/palmer/linux:
riscv: dts: icicle: sort nodes alphabetically
riscv: microchip: icicle: readability fixes
riscv: dts: microchip: add the sundance polarberry
dt-bindings: riscv: microchip: add polarberry compatible string
dt-bindings: vendor-prefixes: add Sundance DSP
riscv: dts: microchip: make the fabric dtsi board specific
dt-bindings: riscv: microchip: document icicle reference design
riscv: dts: microchip: remove soc vendor from filenames
riscv: dts: microchip: move sysctrlr out of soc bus
riscv: dts: microchip: remove icicle memory clocks
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-sql.py')
0 files changed, 0 insertions, 0 deletions