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| author |   Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2012-12-28 12:32:54 +0100 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2013-01-25 12:43:45 +0900 |
| commit | 9916152438a99b15c009e26f0f9cb38efba086d3 (patch) | |
| tree | 3339355704904123756b38d1e52572b4e7a65f0b /tools/perf/scripts/python/check-perf-trace.py | |
| parent | ARM: sh7372: add clock lookup entries for DT-based devices (diff) | |
| download | linux-dev-9916152438a99b15c009e26f0f9cb38efba086d3.tar.xz linux-dev-9916152438a99b15c009e26f0f9cb38efba086d3.zip | |
ARM: sh7372: fix cache clean / invalidate order
According to the Cortex A8 TRM the L2 cache should be first cleaned and
then disabled. Fix the swapped order on sh7372.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions