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| author |   Jes Sorensen <Jes.Sorensen@redhat.com> | 2016-04-07 14:19:25 -0400 |
|---|---|---|
| committer |   Kalle Valo <kvalo@codeaurora.org> | 2016-04-14 15:45:22 +0300 |
| commit | 2949b9ee77b819b90d23096ef44744244283e630 (patch) | |
| tree | 33bf02540cf167034002070f5f59846b9833e38d /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | rtl8xxxu: Handle BB init for 8192eu (diff) | |
rtl8xxxu: Provide special handling when writing RF regs on 8192eu
The 8192eu requires clearing/restoring bit 17 in REG_FPGA0_POWER_SAVE
before/after writing RF registers.
Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions