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| author |   Joseph Lo <josephl@nvidia.com> | 2013-08-12 17:40:02 +0800 |
|---|---|---|
| committer |   Stephen Warren <swarren@nvidia.com> | 2013-08-12 12:22:39 -0600 |
| commit | 0017f447cc01fa499f1d10dec09702d381f13fe0 (patch) | |
| tree | e9f03dbff814dd6991b99b1c12286a7b7d10551a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: tegra: config the polarity of the request of sys clock (diff) | |
| download | linux-dev-0017f447cc01fa499f1d10dec09702d381f13fe0.tar.xz linux-dev-0017f447cc01fa499f1d10dec09702d381f13fe0.zip | |
clk: tegra114: add LP1 suspend/resume support
When the system suspends to LP1, the CPU clock source is switched to
CLK_M (12MHz Oscillator) during suspend/resume flow. The CPU clock
source is controlled by the CCLKG_BURST_POLICY register, and hence this
register must be restored during LP1 resume.
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions