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| author |   Alexander Shiyan <shc_work@mail.ru> | 2013-11-05 18:00:18 +0400 |
|---|---|---|
| committer |   Shawn Guo <shawn.guo@linaro.org> | 2013-11-11 22:58:45 +0800 |
| commit | 036e29918078e38b0b127b89deb4c595028c1bc0 (patch) | |
| tree | 8134d95cec87175f3ae26a293f14d3117f496f55 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: imx: set up pllv3 POWER and BYPASS sequentially (diff) | |
| download | linux-dev-036e29918078e38b0b127b89deb4c595028c1bc0.tar.xz linux-dev-036e29918078e38b0b127b89deb4c595028c1bc0.zip | |
ARM: dts: i.MX51: Fix OTG PHY clock
Proper clock ID for USB OTG PHY is "usb_phy_gate".
The patch changes this mismatch.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions