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author | 2021-06-16 13:31:54 -0700 | |
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committer | 2021-06-24 16:01:41 -0700 | |
commit | 061093d75ae36ba0156eb3b3b1f9cc2e35e9351d (patch) | |
tree | 03f26d5c1333251d9c44251e13f9532b912458a9 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/i915/display/psr: Handle SU Y granularity (diff) | |
download | linux-dev-061093d75ae36ba0156eb3b3b1f9cc2e35e9351d.tar.xz linux-dev-061093d75ae36ba0156eb3b3b1f9cc2e35e9351d.zip |
drm/i915/display/adl_p: Implement Wa_22012278275
The PSR2_CTL io buffer wake and fast wake values do not match
expected in pre production hardware, so here adding a table that
matches with HW to program it with values that HW expect.
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-2-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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