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| author |   Nicolin Chen <Guangyu.Chen@freescale.com> | 2014-04-28 23:07:51 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@linaro.org> | 2014-04-29 12:07:17 -0700 |
| commit | 0b8643900a1bff32ad8bf17ef1f5d57b6d490502 (patch) | |
| tree | e0392b5b712124693387c18185f312e0beb77593 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ASoC: fsl_spdif: Add core clock control for DMA access (diff) | |
| download | linux-dev-0b8643900a1bff32ad8bf17ef1f5d57b6d490502.tar.xz linux-dev-0b8643900a1bff32ad8bf17ef1f5d57b6d490502.zip | |
ASoC: fsl_spdif: Fix clock source for rxclk rate measurement
The rxclk rate actually uses sysclk, ipg clock for example, as its
reference clock to calculate it. But the driver currently doesn't
pass a correct clock source. So fix it.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions