diff options
| author |   Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-08-15 11:51:32 -0300 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-23 14:52:30 +0200 |
| commit | 1403c0d4d46f2eed2ab13b89561c853988ad7513 (patch) | |
| tree | 9a40a0cbbd1ab6cc55e9e4486219a6f3537f5761 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915: fix how we mask PMIMR when adding work to the queue (diff) | |
| download | linux-dev-1403c0d4d46f2eed2ab13b89561c853988ad7513.tar.xz linux-dev-1403c0d4d46f2eed2ab13b89561c853988ad7513.zip | |
drm/i915: merge HSW and SNB PM irq handlers
Because hsw_pm_irq_handler does exactly what gen6_rps_irq_handler does
and also processes the 2 additional VEBOX bits. So merge those
functions and wrap the VEBOX bits on a HAS_VEBOX check. This
check isn't really necessary since the bits are reserved on
SNB/IVB/VLV, but it's a good documentation on who uses them.
v2: - Change IS_HASWELL check to HAS_VEBOX
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions