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author | 2018-01-25 17:01:01 +0100 | |
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committer | 2018-01-29 11:07:16 +0100 | |
commit | 1a32a938b6438afe70c0a2a6dd666f4a49f6c384 (patch) | |
tree | d04395cac7edff153153d4a69ead2b2dbca7dff9 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/dp: Add definitions for TPS4 bits and macros to check the support (diff) | |
download | linux-dev-1a32a938b6438afe70c0a2a6dd666f4a49f6c384.tar.xz linux-dev-1a32a938b6438afe70c0a2a6dd666f4a49f6c384.zip |
drm/stm: ltdc: use crtc_mode_fixup to update adjusted_mode clock
There is a difference between the panel/bridge requested pixel clock
value and the real one due to the hw platform clock preciseness (pll,
dividers...). This patch updates the adjusted_mode clock value with
the real hw clock value so then attached encoder & connector can use
it for precise timing computations.
Signed-off-by: Philippe Cornu <philippe.cornu@st.com>
Reviewed-by: Yannick Fertré <yannick.fertre@st.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180125160101.9102-1-philippe.cornu@st.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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