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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-04-25 10:53:43 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-04-25 10:53:43 +0200
commit1c1d0e5dc445d584e07da68e10e44d8abf787ae1 (patch)
tree9a8d656ef16155d3bcf4d8d1ea1983d63d29d802 /tools/perf/scripts/python/export-to-postgresql.py
parentsoc: renesas: Identify RZ/G2UL SoC (diff)
parentdt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions (diff)
downloadlinux-dev-1c1d0e5dc445d584e07da68e10e44d8abf787ae1.tar.xz
linux-dev-1c1d0e5dc445d584e07da68e10e44d8abf787ae1.zip
Merge tag 'renesas-r8a779g0-dt-binding-defs-tag' into renesas-drivers-for-v5.19
Renesas R-Car V4H DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car V4H (R8A779G0) SoC, shared by driver and DT source files.
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